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第一章总则 第一条为扶持和鼓励高新技术企业发展，根据《中华人民共和国企业所得税法》(以下称《企业所得税法》)、《中华人民共和国企业所得税法实施条例》(以下称《实施条例》)有关规定，特制定本办法。 第二条本办法所称的高新技术企业是指：在国家重点支持的高新技术领域内，持续进行研究开发与技术成果转化，形成企业核心自主知识产权，并以此为基础开展经营活动，在中国境内(不包括港、澳、台地区)注册的居民企业
2015 flew by in the blink of an eye, and throughout the year, the global semiconductor industry witnessed numerous significant developments. Which of these are worth revisiting? At the beginning of the year, many market research firms predicted that the semiconductor industry would grow by 3% to 7% this year. Yet by year-end, most had revised their forecasts downward—some even predicting flat growth or a slight decline. The industry is keen to understand why this happened. Here are three key factors: weak end-market demand, a strong U.S. dollar, and China’s economic slowdown. According to the latest forecast from IC Insights, a market research firm specializing in fabless companies, in 2015, for the first time in 25 years, integrated device manufacturers (IDMs) will outperform fabless chipmakers on the global chip supplier rankings.
In Boy Scouts, we learned “leaves of three, let it be” to avoid the irritation and embarrassment caused by poison ivy. In the semiconductor industry, we learned that “every chip manufacturing supply chain will eventually stabilize at three suppliers.”
The chemical mechanical planarization market will be worth $4.94 billion by 2020.
According to a new market research report on the “Chemical Mechanical Planarization Market by Type (Equipment & Consumables), Application (IC Manufacturing, MEMS & NEMS, Optics and Others), Technology (Leading Edge, More Than Moore’s),”
Safe CMP slurries for future IC materials
New chemical-mechanical planarization (CMP) processes for new materials planned to be used in building future IC devices are now in research and development (R&D). Early data on process trade-offs as well as on environmental, health, and a
Researchers Achieve Breakthrough in Directed Self-Assembly Semiconductor Fabrication Process
Researchers at the U.S. National Institute of Standards and Technology (NIST) and IBM have developed a trenching technique that can be used to fabricate components via self-directed assembly. The researchers say that gold nanoparticles can act like snowplows, sweeping across layers of indium phosphide or other semiconductor materials to create nanoscale channels. This technology holds promise for integrating lasers, sensors, and waveguides onto so-called lab-on-a-chip devices.
TSMC and ITRI have developed a particle monitoring system to improve yield.
Taipei—The Industrial Technology Research Institute (ITRI) of Taiwan and TSMC have developed a new system that can monitor particles in liquids during the chip manufacturing process, particles that could potentially cause defects. This system, named SuperSizer, is capable of measuring particles ranging in size from 3 nm to 1,000 nm, thereby extending beyond the current 40-nm limit of existing monitoring and inspection tools. The system can also measure particle concentration, helping to reduce impurities and scratches on the chip’s substrate and structure. TSMC has already begun using the SuperSizer system in its CMP process and has demonstrated that it can significantly reduce CM.
On the evening of January 3, Aoyang Shunchang issued an announcement stating that on December 31, 2015, the company had signed a Letter of Intent for Investment in the Aoyang Shunchang Integrated Circuit Chip Project with the People's Government of Huai'an City, Jiangsu Province. The company plans to invest in and build an 8-inch integrated circuit chip production line in the Qinghe New Area of Huai'an City, with a total planned investment of approximately RMB 1.5 billion. This production line will primarily focus on the research and development and manufacturing of IGBT and Superjunction devices based on silicon materials, as well as the R&D and mass production of wide-bandgap semiconductor devices made from silicon carbide. The project is expected to be gradually completed within the next one to two years. Upon completion, the project is forecast to achieve annual sales exceeding RMB 2 billion. Announcement
On December 28, 2015, the Shanghai Xinyang-led project titled “Research and Development and Industrialization of Ultra-Pure Electroplating Solutions and Additives for Copper Interconnects in 65-45nm Chips” held its official acceptance meeting at the company. The acceptance meeting was convened and organized by the Implementation and Management Office of the National Key Science and Technology Major Project “Equipment and Complete Process Technologies for Ultra-Large-Scale Integrated Circuit Manufacturing” (hereinafter referred to as “Project 02”). Attendees included Ye Tianchun, Head of the Overall Expert Group of Project 02 and Director of the Institute of Microelectronics, Chinese Academy of Sciences; Wang Ye, Director of the High-Tech Division of the Shanghai Municipal Science and Technology Commission and also from the Implementation and Management Office of Project 02; and Zheng Minzheng, former Deputy Director-General of the Electronic Information Products Department of the Ministry of Industry and Information Technology and Head of the Task Acceptance Expert Panel.
Recently, the Guangdong Province Innovative Research Team for Advanced Electronic Packaging Materials, led by Academician Zhengping Wang and Researcher Rong Sun from the Shenzhen Institute of Advanced Technology, Chinese Academy of Sciences, has achieved a new breakthrough in thermal management of electronic packaging materials. The related paper, “Ice-Templated Assembly Strategy to Construct 3D Boron Nitride Nanosheet Networks in Polymer Composites for Thermal Conductivity Improvement,” has been published online.
Recently, the Guangdong Province Innovative Research Team for Advanced Electronic Packaging Materials, led by Academician Zhengping Wang and Researcher Rong Sun from the Shenzhen Institute of Advanced Technology, Chinese Academy of Sciences, has achieved a new breakthrough in thermal management of electronic packaging materials. The related paper, “Ice-Templated Assembly Strategy to Construct 3D Boron Nitride Nanosheet Networks in Polymer Composites for Thermal Conductivity Improvement,” has been published online.
On December 12, 2015, the groundbreaking ceremony for the second-phase packaging and testing project of HuaRun Semiconductors (Shenzhen) Co., Ltd., a subsidiary of HuaRun Microelectronics Co., Ltd. (“HuaRun Microelectronics”), was held in the Baolong Industrial Zone, Longgang District, Shenzhen. The project is expected to be completed in August 2016 and is planned to have a monthly packaging and testing capacity of 100 million units. Zhu Jinkun, Deputy General Manager of HuaRun Group, along with relevant leaders from Longgang District, Shenzhen, attended the groundbreaking ceremony. HuaRun Group has identified microelectronics as an emerging industry for cultivation and treats it as a core business in terms of investment management; in the future, HuaRun Group will provide even greater support to HuaRun Microelectronics. This investment in packaging and testing aligns with HuaRun Microelectronics’ overall industrial chain layout.
Semiconductor packaging technology was long overlooked, only recently coming to be recognized as a key component of the design process—and a critical enabler of Moore’s Law. According to a report by Semiconductor Engineering, traditionally, packaging was hardly ever considered a major part of the design architecture; instead, price and durability were typically the primary metrics. However, as we move into process nodes below 28 nanometers and as IoT applications gain traction, packaging is increasingly becoming a key differentiator in the market. This shift has fundamentally altered previous design and process rules centered on planar silicon components, making packaging an essential consideration at every stage—from initial concept and design all the way through to fabrication.
The "Father of FinFET" Wins U.S. Top Technology Award: Enabling Chips to Reach 14 Nanometers
According to a report on the White House’s official website, on the 22nd, U.S. Eastern Time, the list of winners of the 2015 U.S. National Science Medal and the National Medal of Technology and Innovation was announced. The list includes nine recipients of the National Medal of Science and eight recipients of the National Medal of Technology and Innovation. Among them, Chinese-American scientist Zhengming Hu was awarded the annual National Medal of Technology and Innovation. Professor Hu is the inventor of the FinFET (Fin Field-Effect Transistor). Today, companies such as Samsung and TSMC are able to produce chips using 14nm/16nm processes.
China's largest wafer foundry, SMIC, recently announced that the company, together with the National Integrated Circuit Fund and Qualcomm, has collectively invested US$280 million in cash to subscribe for preferred shares of SMIC Changjiang (Cayman). The company stated that this subscription will help expand the wafer production capacity of its joint venture subsidiary in Jiangyin and accelerate the pace of construction. Analysts pointed out that global wafer production capacity is increasingly concentrating in mainland China. According to the share purchase agreement, SMIC Changjiang (Cayman) has agreed to issue 467 million shares of Series B preferred stock. Among these, SMIC, the National Integrated Circuit Fund, and Qualcomm subscribed for US$160 million, US$100 million, and US$20 million respectively. Additionally,
UMC Expands 28nm Capacity and Participates in Fujitsu’s Tripartite Cash Increase.
On the 16th, UMC, a wafer foundry, held a board of directors meeting during which it approved a capital budget execution plan totaling NT$12.571 billion. This funding is expected to be used for expanding capacity in the 28-nanometer process technology. Additionally, the board approved UMC’s participation in a cash increase by Fujitsu Semiconductor Japan, with an investment amount of approximately NT$1.359 billion. Due to inventory adjustments by customers, UMC has adopted a more conservative outlook for the fourth quarter. However, wafer input for the 28-nanometer process has already begun to rebound, and internally, UMC anticipates starting shipments in the first quarter of next year. The UMC board of directors approved a capital expenditure budget of NT$12.571 billion, which will be used to continue expanding the 28-nanometer capacity at its 12-inch fab in Southern Science Park, in preparation for next year’s new customer demands.
Samsung and GF will use 14nm process technology next year to manufacture new chips for AMD.
According to a report by South Korea’s Electronic Times, sources say that Samsung Electronics will begin manufacturing new chips for AMD next year. The report indicates that starting next year, Samsung’s foundry business will join forces with chipmaker GlobalFoundries to use the 14-nanometer process technology in producing central processing units (CPUs) and graphics processing units (GPUs) for AMD. In recent quarters, Samsung has been actively seeking to expand its component business by attracting external customers, in an effort to offset the impact of declining profits from its smartphone business. Samsung currently already manufactures chips for companies such as Apple and NVIDIA.
Littelfuse Announces Investment in Silicon Carbide Technology
Littelfuse, a global leader in circuit protection solutions, recently announced that, as part of its strategic initiative to aggressively expand into the power semiconductor component market for industrial and automotive applications, Littelfuse has made an investment in Monolith Semiconductor, a startup specializing in silicon carbide (SiC) technology development. Silicon carbide is an emerging semiconductor material experiencing rapid growth; compared to traditional silicon, it enables power components to operate at higher switching frequencies and temperatures. This allows inverters and other power conversion systems to achieve greater power density, improved energy efficiency, and reduced costs.
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