The era of advanced packaging has arrived, and it is expected to become a key differentiator in the market.

   Semiconductor packaging skill The technique was previously undervalued, but only recently has it come to be recognized as one of the key components of the design process—and as crucial to achieving Moore’s Law. According to... According to a report by the Semiconductor Engineering website, traditionally... Encapsulation It has almost never been a primary component of the design architecture, while the key metrics have often been price and durability.

　　However, entering 28 Sub-nanometer Process Technology and the Internet of Things (IoT) In the application, Encapsulation It is gradually becoming a key differentiator in the market, marking a departure from the past’s flat, two-dimensional silicon component design and process rules. As a result, packaging has also become an aspect that requires careful attention at every stage—from initial concept and design all the way through to fabrication.

　　 Tirias Research Analysts said that, Semiconductor The three traditional major pillar technologies are microphotolithography. (Lithography) — transistor design and materials. However, as lithography technology increasingly struggles to keep pace with Moore’s Law, packaging technology—featuring new materials and processing techniques—is emerging as the fourth major pillar.

　　 Semiconductor Industry is shifting from 2D Transformation 3D Technological process, and system-level packaging (System in Package) Often an indispensable architecture, Freescale. (Freescale) Intel (Intel) Mai Wei'er (Marvell) Chip manufacturers have also successively adopted this architecture.

　　And the design space of certain markets (Form Factor) Subject to power budget (Power Budget) Due to factors such as package thickness and elasticity, system-level packaging has become an inevitable trend. When interconnections are thicker, distances are shortened, and the number of wires is reduced, power consumption will also be lower.

　　Consulting agency Yole Development The report indicates that, 2015 This year marks the dawn of a new generation of electronic devices and also the initial year for advanced packaging technologies to enter mass production and align with functional roadmaps. Advanced packaging can reduce costs, enhance performance, and integrate functions—and further... 2020 The year is also expected to account for all packaging services. 44% , market capitalization approximately 300 hundred million dollars.

　　Smartphones and tablets are the primary markets for advanced packaging, while servers... PC Gaming platforms, TVs, set-top boxes (set-top box) Wearable devices, Internet of Things (IoT) Other applications are also expected to leverage the advantages of advanced packaging technologies.

　　 Lam Research Deputy General Manager of Product Execution Richard Gottscho It also indicates that advanced packaging will shape a substantial market and stimulate high aspect-ratio designs. (high-aspect ratio) Dielectric layer etching (dielectric etch) Atomic layer deposition (ALD) Silicon perforation (TSV) Etching and other technology markets.

　　Today, the packaging industry and commercial chips are known to have adopted fan-out packaging. (fan-out) 、2.5D Monolithic (Monolithic) 3D Although new packaging technologies have emerged, the market is still not highly mass-produced, and a standardized process experience suitable for different markets has yet to be developed. Meanwhile, as all manufacturers scramble to find the optimal standard process, the boundaries between chips, circuit boards, and systems are becoming increasingly blurred.

　　High-performance computing and networking providers eSilicon Under development 2.5D Chips, and eSilicon Indicates, 2015 Annual demand doubles, driven by high-bandwidth memory. (HBM) Market demand is the primary driving force. Currently, eSilicon The biggest challenge we face is the intermediate board. (Interposer) Packaging costs and yield improvement.

　　Chip packaging technology can also be outsourced to other companies; many large, specialized firms offer outsourced packaging and testing services. (Outsourced Assembly and Test; OSAT) Manufacturers are also developing more advanced nanotechnology and packaging technologies through various means, including acquiring advanced semiconductor manufacturing equipment.

　　Meanwhile, TSMC, GlobalFoundries Samsung Electronics (Samsung Electronics) Major wafer foundries such as SMIC and UMC are also busy upgrading their advanced packaging technologies. Hon Hai Foxconn and U.S.-based Jabil Group... (Jabil) Electronics manufacturing companies are also extending their reach into printed circuit boards. (PCB) In fields other than that.

　　Moreover, the technologies adopted by each manufacturer serve different market objectives. For example, packaging technologies suited for the automotive market will differ significantly from those designed for the consumer market.

　　The packaging method of a chip can significantly influence other aspects of chip design; even minor changes within the package can dramatically alter the electronic or thermal characteristics of the packaging system. There are numerous different assembly configurations for materials inside the package, and special-application chips are often housed within the package. (Application-Specific Integrated Circuit) 、 HBM There are infinite combinations possible for the intermediary board and the package, and reusing them also presents numerous challenges.

　　The primary industry-wide transformation trend is expanding from the chip level to the system level. Many manufacturers are now developing new materials for advanced packaging, including organic interposers and complex polymers. Companies that previously would never have been associated with each other are now collaborating.

　　Sunrise and Japan TDK In 2015 Announced the joint establishment of Riyueyang Electronics Co., Ltd. this year. (ASE Embedded Electronics Incorporated) The joint goal is to produce embedded substrates and to miniaturize chips within four-layer plastic substrates. 50 μm Thickness.

　　Monolithic 3D The technology is expected to be the lowest-cost mass-production solution; however, at that time, we’ll also need to take into account... TSV The number of holes that can be drilled into the substrate, the drilling speed, and the drilling density.

　　Intel, IBM Wait for processor vendors as well as companies like Xilinx. (Xilinx) Wait FPGA Suppliers will continue to pursue Moore’s Law. So far, 7 Nano-processing has been confirmed to be included in the future blueprints of various industry players, and everyone is paying close attention to... 5 Nanotechnology remains in a wait-and-see stance.

　　Process scaling is becoming increasingly expensive and time-consuming, while advanced packaging technologies offer an alternative approach to enhancing performance, reducing power consumption, optimizing area, and adding new features and capabilities. An increasing number of supply-chain vendors are now starting to provide solutions that will drive the semiconductor industry toward this trend for decades to come.