Product Description
Advanced packaging technology has emerged as one of the most critical technologies in the semiconductor industry in recent years for two main reasons. First, continuing to drive device (or chip) scaling in line with Moore’s Law has become more challenging than ever before. Manufacturing costs are rising rapidly, making chip scaling less economically viable. To address this challenge, chip partitioning combined with system integration of multiple chips through SiP—System-in-Package—and advanced packaging technologies have been proposed as either a replacement for or a complementary approach to conventional chip scaling, enabling system-level scaling. On the other hand, new demands in the semiconductor market, driven by smart mobile devices, are also playing a significant role.
Computing, cloud computing, and the Next Big Things (wearables, IoT, etc.) are pushing existing packaging technologies—such as wire bonding, flip-chip, multi-chip modules (MCM), and package-on-package (PoP)—beyond their current limitations. Innovative advanced packaging technologies are essential to meet the future needs of the semiconductor market.
Very stringent requirements on maximized system performance (computation speed and memory bandwidth) with minimum consumed power, occupying smallest component area (or form factor), and using most competitive cost have to be fulfilled in order to meet the system demands described above. TSMC has initiated and developed innovative wafer-level-system-integration (WLSI) platform technologies, which include UFI (wafer-level chip
scale packaging, WLCSP), InFO (fan-out wafer-level packaging, FOWLP) and CoWoS (Si interposer, 2.5D) packaging technologies to meet the system requirements from low to high I/O pin-count applications. Since we proposed and delivered these technologies, they have attracted tremendous attention and become an emerging new trend in the semiconductor industry. In this paper, we will present the advanced electronic package materials employed in
those technologies and discuss their challenges and opportunities in the future.
Keywords: Advanced packaging materials, WLSI, 3DIC, Fan-out wafer-level packaging, Silicon interposer
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