Frontier Perspective: G450 Update, Panasonic Plasma Cutting, Thin Flexible Chip Packaging, and Osram’s Overview of LED Packaging

G450-450mm Wafer Status Report: For most of us, whether we’re working on FEOL or packaging, we’re closely watching developments related to 450mm wafers—specifically: (1) whether they’ll actually happen at all; and (2) if they do happen, when exactly that will be. Yet, these questions remain unanswered. Recently, at SEMICON Europe, some information about G450C was shared—but we really can’t count on such a highly anticipated project to come to fruition, especially given that it’s been deemed unlikely to succeed. G450C is a consortium operating out of the Albany Nanotech Center, with members including...

　　G450-450mm Wafer Status Report

　　For most people, whether we’re working on FEOL or packaging, we’re closely watching developments related to 450mm wafers: (1) whether they’ll actually happen at all; and (2) if they do happen, when exactly that will be. Yet these questions remain unanswered. Recently, at SEMICON held in Europe, some information about G450C was shared—but we really can’t count on a project as highly anticipated as this one to come to fruition, especially given that it’s been deemed unfeasible.

　　G450C is a consortium operating at the Albany Nanotechnology Center, with members including Intel, TSMC, Samsung, and IBM’s global wafer foundry. IBM has already sold its semiconductor manufacturing business to GlobalFoundries. Therefore, for IBM, this project can be considered a development platform rather than a purely commercial one.

　　The alliance’s goal is “to complete the 14/10nm full-process line by 2016.” The following is a report on the installation status of the relevant tools:

　　The process requirement report is as follows:

　　l The process capability is 98% at 14nm.

　　l Capacity: 80% of the processing tools can achieve performance equal to or better than that of 300mm (WPH).

　　Performance: The process tool has reached or is close to the 300mm process target.

　　Suppliers can deliver HVM tools within 18 to 24 months after the customer places an order.

　　L delivers at least 30% cost savings.

　　Panasonic - Plasma Cutting

　　According to Panasonic, plasma-based cutting offers advantages such as non-destructive processing and narrower kerf widths, resulting in a higher chip-cutting rate. Panasonic reports that, using the APX300 HVM tool, the etching speed can reach 20 meters per minute.

　　In addition, the fracture strength of silicon has been greatly improved.

　　The processing flow for the front and back sides is shown below.

　　Fraunhofer EMFT – Flexible Packaging for Ultra-Thin Devices

　　Christof Landesberger from Fraunhofer EMFT discussed the development of a process for embedding and interconnecting ultra-thin IC devices in flexible device substrate packaging—specifically, a flexible chip foil package that enables ultra-thin IC device interconnections.

　　Application objectives include:

　　l Smartphones – Reducing Package Thickness

　　l Healthcare and wearable devices

　　Large-area electronic components, such as flexible displays and photovoltaic modules.

　　l Sensors on curved surfaces, such as those applied to or integrated into machines, buildings, robots, and homes;

　　l Internet of Things

　　The key question is: Does the mechanical strength of the ultra-thin chip increase after it’s embedded in the thin film?

　　They reported that, after embedding, the fracture strength of the ultra-thin chips showed a significant increase, as illustrated by the Weibull plot below.

　　The process flow is shown in the figure below:

　　In their microcontroller demonstrator, a 25-μm-thick chip is embedded within a cavity in a flexible substrate. The chip is covered by a 10-μm-thin dielectric film and then patterned and interconnected. The final package exhibits no cracking or delamination even after bending.

　　Their preliminary conclusion is that rigid packaging will be used for chips with thicknesses ranging from 50 to 150 μm, while flexible packaging will be used for ultra-thin chips with thicknesses between 10 and 30 μm.

　　A Review of Chip Interconnections in Osram LED Packages

　　Standard LED packages still primarily rely on lead frames. They are:

　　l Easily assembled using standard SMT reflow soldering

　　l Exhibits the lowest manufacturing cost

　　l The entire pad features excellent heat dissipation.

　　l Single WB interconnection with time-tested reliability

　　A large number of encapsulation configurations are available and can be used.

　　Chip bonding methods include conductive epoxy resins, non-conductive silicones, sintered materials, and eutectic solder alloys. These approaches offer varying thermal properties, costs, and compatibility with different packaging types.

　　Among other things, they concluded:

　　When comparing silver-acrylate-filled chip attachment with its epoxy counterpart, Osram found that acrylates exhibit less stable interconnection characteristics after soldering thermal treatment.

　　Corrosive gases such as moisture, NO2, and SO2 can diffuse through transparent silicone sealants. The attack on copper is particularly severe. A hybrid siloxane diffusion barrier should be used for copper surfaces with gold plating.

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