Current Status and Prospects of 450mm Wafer CMP Equipment Technology
Wafer size replacement usually takes about 10 years. For example, the 200mm wafer was born in 1991. The widely used 300mm wafer was introduced by Intel in 2001 and was first used in the 130nm process processor. The 450mm wafer has more than twice the silicon area and 300mm chip cutting, so the unit cost per chip is greatly reduced. In addition, large-size wafers will increase the efficiency of energy, water and other resources, and reduce the impact on environmental pollution, global warming of the greenhouse effect, and water shortage.
In 2007, ISMI (International SEMATECH Manufacture Initiative) stressed that current semiconductor production still follows Moore's Law, pointing out that the future production cost needs to be reduced by 30%, and the product production cycle needs to be improved by 50%, and this demand can only be achieved by transitioning to 450mm wafer size. .
In 2008, Intel, Samsung, TSMC, ISMI and semiconductor equipment suppliers decided to jointly develop 450mm wafers. The initial target is to set up a 450mm pilot production line in 2012. The experimental line was originally planned to form operational capability in 2013-2014. Formed a 450mm official production line from 2015 to 2016. This blueprint was written into the ITRS (Semiconductor Association Technology Development Roadmap) for 2009 and 2010. However, the ITRS in 2012 was revised and the original planned goals were all delayed by 2 years.
With the gradual expansion of wafer size and the expansion of capital investment, semiconductor chip manufacturers need to bear the cost of construction in the early stage, such as investment of about 100 million US dollars from 100mm (4 inch) production line, to the current mainstream 300mm (12 The inch line requires an investment of about $2 to $2.5 billion. In the next few years, with the advent of the 450mm era, the factory's automation level will be between machines, with an integrated process inspection system. More high-level processes will require higher-volume wafer fabrication facilities with more sophisticated process automation and plant management. The cost of a large factory is at least more than 10 billion US dollars, or even as high as 25 to 30 billion US dollars. The huge construction cost is not affordable for ordinary companies, and its early research and development costs are also amazing. Therefore, the world's top five semiconductor companies IBM, Intel (Intel) ), Samsung Electronics, TSMC and Global Foundries jointly established the Global 450 Consortium (G450C) in 2011, and set up a research and development center in Albany, New York, USA, with an initial investment of 4.4 billion US dollars. Accelerating the era of 450mm wafer size.
According to the 2012 ITRS (Semiconductor Industry Association Roadmap) plan, 450mm wafer size production materials and equipment manufacturers should form production capacity in 2013-2014, and provide corresponding equipment to IDM (integrated device manufacturer) and Foundry (generation factory).
Only by enabling chip manufacturers and equipment manufacturers to achieve a win-win situation at the same time can we continue to promote the healthy development of the semiconductor industry. Similarly, equipment manufacturers (OEMs) need to invest more R&D expenses than before to achieve the demanding process and technical requirements of 450mm wafers. As wafer sizes increase, system manufacturers are placing higher demands on system integration, system automation, material requirements, and overall power consumption. Starting with multilayer metal interconnects (more than three layers, about 0.25μm technology nodes), CMP has become one of the key and necessary devices for chip manufacturing. As technology nodes continue to decrease, the number of times of metal and dielectric flattening is increasing. And the requirements for uniformity are getting higher and higher, and CMP technology is increasingly highlighting its importance.
Without CMP technology, lithography of higher nodes (less than 0.35μm technology nodes) will not be implemented; at the same time, CMP technology can also realize the manufacturing technology of complex layer structure. In the case of 450mm wafer size, the main need for CMP technology is :
(1) As the feature line width of semiconductor devices continues to decrease, the resolution requirements of lithographic equipment are getting higher and higher;
(2) the need for the development of multi-layer interconnect technology;
(3) the need for shallow trench isolation process technology applications;
(4) the need for the introduction of copper process technology;
(5) Requirements for low-k dielectric processes;
(6) The requirements of the HKMG process;
(7) Requirements for the FinFET process.
Therefore, the technical research and discussion of 450mm wafer size CMP equipment has important forward-looking practical value.
Latest developments in 1CMP consumables
At the same time, 450mm CMP equipment development, CMP consumables started at the same time, has achieved a lot of results.
1.1 Research progress of new polishing liquid
In the 450mm CMP process, the new polishing liquid is mainly concentrated in the application of HKMG and FinFETCMP processes. The current research results of the new polishing liquid are: the chemical removal effect of the polishing liquid is greater than the mechanical removal effect to reduce the defects caused by the mechanical action. The abrasive material in the polishing liquid basically replaces the traditional silica abrasive material with the cerium oxide material. In the 450mm process, the transistor gate stacking process and the introduction of new materials make the transistor manufacturing more complicated and the control requirements are higher and higher, so the selectivity of the polishing liquid to the new material determines the success or failure of the planarization process defect.
The RL310 from Dow Chemical's Dow Electronic Materials has no abrasive particles and self-stopping characteristics, and has been used in the 300mm IDM (integrated device manufacturer) for 90 to 45nm for more than 3 years; Its next-generation, non-abrasive particle solution was also selected by the leading IDM (integrated device manufacturer) as a 14nm node process record.
1.2 Research progress on new polishing pads
Polishing pad technology advances slowly relative to polishing fluids. After entering the 21st century, the advancement of polishing pad technology is mainly focused on improving process capability and reducing process defects. In the 450mm process, the required polishing pad diameter is above 1067mm (42 inches), and the polishing pad dressing mode and the surface morphology of the polishing pad are in-depth research on the quality of the flattening. On the other hand, under the premise of ensuring the quality of the flattening, the surface morphology of the polishing pad is studied to provide support for the research of the maximum application efficiency of the polishing liquid. Dow Chemical's Dow Electronic Materials has introduced the highest performance level of the IKONICTM CMP pad series for CMP applications at 28nm and below technology centers, currently in the laboratory and test lines. Test evaluation.
1.3 polishing pad dresser
3M Corporation dominates the main market for CMP conditioners. The polishing pad conditioner is used for the polishing of the polishing pad. The research of the dresser focuses on the size of the dresser, the particle size of the diamond, the density of the diamond particles, the arrangement, and the bonding method. Faced with the 450mm process line requirements, the 450mm CMP dresser is larger than the 300mm CMP size. The bonding method of the diamond particles is the main research content, so as to ensure the life of the dresser without the loss of diamond particles, resulting in the wafer hurt.
2 key technology prospects and analysis
The above consumables have been developed independently of the CMP equipment and have achieved practical results, which provides a convenient condition for 450mm CMP. CMP equipment is also under development. At present, AMAT (American Applied Materials) and Ebara (Japan Ebara), two major manufacturers of CMP equipment, occupy more than 90% of the market of 300mm wafers, and on CMP equipment of 450mm wafers, these two Equipment manufacturers will certainly not fall behind, secretly research and development of equipment and technology, and seize the market opportunity.
For 450mm CMP equipment, its main trends:
2.1 System Integration Technology
The main CMP process is for STI (shallow trench isolation), ILD (interlayer dielectric), Tungsten (tungsten), and Copper (copper) applications, which will continue into the 450mm process, but starting from the 14nm node, whether it is a logic chip or The memory chip, the device's HKMG (high-k metal gate) and FinFET structure are inevitable requirements, so the HKMG and FinFet process requirements are the main starting point for 450mm wafer CMP.
Since the film thickness of the HKMG and FinFET structures has progressed to a thickness of less than 10 nm, higher requirements have been placed on the accuracy and control of CMP equipment. In the 300mm CMP process plan, the AMAT (application material) three-step process (three polishing) dominates the mainstream, and in the 450mm CMP process plan, it is possible to return to the two-step process. This is not only to reduce the planar size requirements of CMP equipment, the main driving force is the real-time control requirements of film thickness. This also puts higher requirements on the research and development of various types of polishing fluids, the key link of CMP. The current gratifying situation is that the development of polishing fluid is advanced in advance without relying on 450mm CMP equipment, and has produced practical results.
Since the 450mm CMP process plan is likely to return to the two-step process solution, it can only be requested from the overall layout of the CMP equipment. Therefore, the overall layout difficulty of the device is that the device layout not only has to adapt to the functions of various CMP processes, but also needs to be adapted to the functional scheme of the device itself to be redesigned rather than the extension of the overall layout of the 300 mm wafer CMP device.
2.2 Multi-zone pressure control carrier technology
Since the polishing motion mode of the CMP equipment has been unified into the rotary motion mode in the 200 mm process period and shows its superiority, in the 450 mm process, the polishing motion mode of the CMP equipment still follows the rotary motion mode. On the other hand, in order to solve the problem of inconsistent comprehensive removal rate of the rotary motion mode in the polishing process, the multi-zone pressure control carrier technology application is generated, and the technology will be extended and applied in the 450 mm CMP equipment. But at the technical level, the following difficulties are faced:
(1) Compared with the multi-zone pressure control carrier of 300mm CMP equipment, the 450mm wafer CMP equipment carrier will adopt 6-8 area design, which makes the carrier structure complex and the related film parts manufacturing complicated.
(2) One of the carrier consumables needs to be designed according to the "quick replacement" concept, which increases the complexity of the retaining ring and the carrier structure.
(3) As the pressure requirements for copper polishing and HKMG process polishing are getting smaller and smaller (possibly less than 2.07×10-3 MPa), the maintenance of pressure accuracy under polishing and the maintenance of regional pressure accuracy are very high, and the control resolution requirements of the fluid system are required. Less than 0.14×10-3 MPa, the resolution accuracy of the low pressure fluid control valve is increased again. The use of ultra-low pressure and high precision maintenance fluid systems and their control systems form a unique technology for 450mm CMP equipment.
2.3 polishing pad dressing technology
From the generation and widespread application of CMP technology to the present, polishing pad dressing technology has been using diamond wheel dressing technology to maintain a stable removal rate of the polishing pad and extend the life of the polishing pad. However, with the increase of wafer diameter and the generation of new polishing pads, the diamond wheel dressing technology is mainly oriented to the direction of not producing process defects. However, the risk of diamond wheel slag still exists, which is a fatal problem for the 450mm process. Therefore, the development of a polishing pad finishing technology and method that does not cause pollution has become a unique technology of the 450mm CMP process.
2.4 endpoint detection technology
Since the thickness of the CMP process films such as STI, HKMG, and Copper is less than 10 nm, the endpoint detection accuracy is a key technology.
(1) Full-section eddy current scanning technology will be extended to 450mm applications. However, the eddy current frequency will increase, and the real-time scanning algorithm research will be revised with the diversification of the test environment to form a unique technology of the 450mm CMP process.
(2) Full-section optical scanning technology will also be extended to 450mm applications, and white light sources will still be used. However, the light source needs to be determined experimentally. The real-time scanning algorithm research will be modified with the diversification of the test environment and the variety of polishing materials, and will be modified by experiments to form a unique technology of 450mm CMP process.
2.5 post cleaning technology
In the 200mm process, the post-CMP cleaning system can be used offline with respect to CMP. After entering the 300mm process, the CMP integrated cleaning system has become the standard module for CMP equipment.
The cleaning process in integrated circuit manufacturing accounts for about 30% of the entire process. As the manufacturing nodes continue to shrink, the cleaning effect is not only required to be higher and higher, but also the microstructural damage requirements of the device are becoming more and more demanding. At the 14 nm node, the post-cleaning particle index requires less than 10 defective particles larger than 30 nm, which poses a higher challenge for post-CMP cleaning.
In the 300mm CMP equipment technology, AMAT's post-cleaning technology has developed a fourth-generation post-cleaning system due to technical needs and commercial supply chain reasons. The vertical cleaning and IPA drying post-cleaning technology represented by Reflexion LKCMP equipment has been widely used since 2008 and extended to 14nm process nodes. However, even though Reflexion LKCMP uses the most advanced post-cleaning technology available, there are still problems at the 14nm process node.
In the 450mm cleaning technology, the supercritical cleaning technology generates and begins the test evaluation. Because the supercritical cleaning technology has the characteristics of ultra-clean and environmental protection, water saving, and small damage to the micro-structure of the device, it can be applied to the post-CMP cleaning process. However, due to the comprehensive requirements for integration with CMP equipment, 300mm CMP post-cleaning technology continues to extend to 450mm or another revolutionary technology, which has not yet been finalized.
Therefore, in the 450mm process, the new post-CMP cleaning technology is an inevitable choice and forms its unique technology.
This paper analyzes the history of integrated circuit development on the whole, and on the basis of the development trend of consumables, lays a foundation for the development of 450mm CMP equipment, and forecasts and analyzes five key technologies of 450mm wafer CMP.
In 2013, semiconductor manufacturers did not significantly reduce capital expenditures as analysts expected. Intel, TSMC, and Samsung's Big Three will not only continue to expand the capacity of advanced processes, but also want to surpass the process of 20nm and 450mm wafer technology. Opponents, the above three companies will continue to invest in the next few years, which will accelerate the promotion of CM
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